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Test Code : HP0-680
Test denomination : Implementing Enterprise Virtual Array
Vendor denomination : HP
real questions : 113 existent Questions

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Implementing Enterprise Virtual Array exam

virtual Emulation knows No Bounds for Networking Design Verification | HP0-680 existent Questions and VCE rehearse Test

With the magnificent surge distinguished for connectivity, the information superhighway has turn into the communications toll road for billions of clients. in keeping with “information superhighway live Stats,” 4.2 billion individuals traveled the information superhighway in 2019. That’s about 55% of the realm’s population, and the amount of site visitors generated by course of this linked inhabitants is actually astonishing.

The big net of computer systems and cell devices that transmit, regain hold of, and deliver this statistics wouldn’t even live viable with out advances in networking technologies. Ethernet is an iconic instance—one which continues to adapt with extraordinary rapidity.

when you esteem that the 1980s, when a seven-port Ethernet swap turned into brought, port signify number has scaled dramatically. today's Ethernet switches and routers now attain 1000 ports, and with the aid of the conclude of 2020, will accommodate 4000 ports. additionally, in contrast to the throughput of 10 Mb/s of the seven-port Ethernet switches, they could now ply throughputs of 1/10/25/40/50/one hundred/200/400 Gb/s.

while the Ethernet Alliance can foresee the future growth in number of ports, the enhance of bandwidth to 1600 Gb/s is much less evident because of limits within the transmission medium. Dense wavelength division multiplexing and protocol evaluation module signaling were used to beat these limits thus far. They may additionally assume a circulation to adopt more parallelism to expand the bandwidth. Latency in networking switches has continually diminished, and these days the bottom latencies occupy dropped under 1 µs.

a bigger number of ports, expanding throughput, reducing latency, and typical improvement in security and ease of exercise are making nowadays’s network switches and routers among the many biggest IC designs ever developed, achieving well past one billion gates and now on par with the largest processor and pics chips. Verifying such complicated IC designs, earlier than silicon availability, is a frightening assignment. happily, aid has already arrived in the sort of hardware emulation and, inevitable to Ethernet, with the VirtuaLAB Ethernet answer.

this article explains one of the expertise in the back of why virtual emulation is the best mode to maintain up with the growing to live speeds and capacities of Ethernet designs.

In-Circuit Emulation Limits

as an instance, a design of a modern equipment-on-chip (SoC) with a 256-port Ethernet interface and a variable bandwidth of 1/25/forty/50/one hundred/200/400 Gb/s surpasses the capabilities of typical digital simulators. whereas hardware description language simulation may besides live used on the obstruct stage, verification of a entire design of one thousand million gates with simulated site visitors is unrealistic and ought to live dominated out. here's a first-rate case for the usage of hardware emulation in what’s called in-circuit-emulation (ICE) mode.

enjoyable to the ICE verification mode is the ability to examine a design with revise traffic. An ICE configuration requires one Ethernet tester per port. due to the fact that an instantaneous connection isn’t viable due to the diverse accelerate domains between the tester and the emulated design beneath examine (DUT), a pace expense adapter is inserted between both. This reconciles the quick velocity of the tester to the distinctly low pace of the emulated DUT.

however after they address a latest change design that can assist a port configuration of 256 ports and variable bandwidths of 1/10/25/forty/50/one hundred Gb/s, they delivery to perceive some cracks within the ice. since the design has 256 ports, the ICE setup requires 256 Ethernet check ports, 256 Ethernet accelerate adapter ports, in addition to CAT5 and IO cables to the emulator gadget (1K cable channels) (Fig. 1). An ICE mode turns into elaborate, no longer simplest from a cabling standpoint, however additionally from a traffic-form accuracy perspective when exercising a DUT through accelerate adapter ports.

figure-1-new_web.png

1. A 256-port Ethernet change is verified the exercise of ICE.

aside from the spaghetti-cable arrangement, the skills unreliability of the hardware, common charge, and lack of traffic-form accuracy, a irritating hardship is that the entire setup supports handiest a unique consumer located in the proximity of the emulation lab. Time-sharing using synchronous parallel and batch mode strategies is extremely intricate.

Untangling Ethernet Design Verification

having said that, a digital-emulation environment frees users from the boundaries and restrictions of ICE. Let’s compare the ICE setup to an equivalent one the exercise of a virtual approach. in the digital scenario, Ethernet testers are modeled in application working beneath Linux and/or digital machines on a laptop related to an emulator. This model is an accurate representation of the exact physical tester, in keeping with confirmed-in-implementation highbrow property.

digital testers usually consist of Ethernet Packet Generator and monitor (EPGM) features that Do just that—generate, transmit, and computer screen Ethernet packets exchanged with the DUT. it's going to occupy the capacity to configure any GMII, XGMII, 25GMII, XLGMII, 50GMII, CGMII, 200GMII, 400GMII, or physical Coding Sub-layer (PCS) interfaces for 1G, 10G, 25G, 40G, 50G, 100G, 200G, 400G, respectively.

The interface between the digital tester and the DUT can embrace one too many instances of the facts programming interface (DPI) to scale up the emulation test device to waiton terabit throughputs for the biggest networking techniques. Packet stimulus for transmission and packet reception for evaluation flows bidirectionally via an EPGM implement to/from a digital Ethernet transactor and Null-PHY linked to the DUT. One xRTL transactor is required for every port of any Media independent Interface (xMII) or PCS-supported kind (Fig. 2).

Figure_2_EPGM_DPI.png

2. One instance of EPGM-DPI speaking to a digital Ethernet xRTL is sum that’s required.

for instance, VirtuaLAB Ethernet can supply as much as 64 ports per pc for any accelerate classification. multiple VirtuaLAB functions are able to live bundled together across diverse workstations to support huge port signify configurations. excessive-speed optical hyperlink cards are used to co-mannequin host workstations to the emulator.

This tightly built-in transport mechanism is tuned for maximum wall-clock efficiency rates and is completely clear to the testbench. VirtuaLAB Ethernet’s parallel runtime structure has been implemented such that records-airplane emulation throughput scales linearly with co-model port signify (Fig. 3). as an instance, emulation throughput performance with VirtuaLAB Ethernet for a 256-port SoC is in extra of 1T packets per day.

figure_3_comodel.png

3. here's a high-level view of the multi-co-mannequin topology.

other than enabling tall facts-plane transport, a few different benefits arrive from the usage of this strategy. First, reconfiguring the virtual tester to operate quite a lot of services is quick by course of far flung entry. 2nd, the computing device is a solid and legitimate piece of gadget acquired at a fraction of the can imbue of a posh Ethernet tester of equivalent functionality. Third, these workstations descend neatly into tolerable statistics-core-grid engine requirements.

much more critical is the skill to tackle varied concurrent clients and concurrency across disbursed application fashions that are simple in aiding significant application construction groups. Emulation hardware and application architecture views occupy to repartee this scalability factor from the floor up.

A digital Ethernet machine may still usher a directed verify mode of operation to define and ply the streaming of inevitable packet varieties, site visitors form, scheduling and mistake injection into the emulated DUT, in addition to trace and evaluation of packets back from the DUT. VirtuaLAB Ethernet is an instance of how Tcl, Python, and GUI interfaces can ease generation, analysis, and scoreboarding via suggestions-primarily based user definitions.

VirtuaLAB Ethernet can besides live configured for multiple co-mannequin hosts supported by using one illustration of application running on as much as 16 co-mannequin hosts, with as much as 1K virtual Ethernet xRTL Transactors connected to Null-PHYs and to the DUT ports on the emulator. These 1K VirtuaLAB instances can besides live managed through a centralized “controller” application utility invoked from one of the workstations.

complicated testing and analysis

A digital Ethernet solution is well-suitable for complicated check scenario technology, monitoring, and automation. as an example, an interactive and batch-mode Tcl/Python programming command line interface (CLI) may besides live included to control sum media entry controllers, and to generate myriad protocol and site visitors amble eventualities. VirtuaLAB Ethernet helps traffic progress CLIs over non-homogenous packet varieties. Percentages of traffic per protocol kind will besides live blended, with differing packet sizes or random size per movement or move. It’s additionally viable to manage packet transmission and arbitration.

driven by means of the tall rate of networking technology convergence, digital Ethernet is a fragment of a category of digital networking solutions that comprises other related protocols, corresponding to flexible Ethernet, 5G improved ordinary Packet Radio Interface, and Optical Transport Networking. digital Ethernet solutions besides role offline traffic analysis, per port/move information, and many different tangled analysis features. OSI plane 1 – degree 7 stack trying out should still besides live provisioned.

furthermore, VirtuaLAB Ethernet helps stress trying out and flounder injection for advanced switching topology using the mutable (dynamic) port neighborhood reconfiguration facets for 1/10/25/40/50/100/200/400-Gb/s full-duplex speeds. for example, xMII/PCS widths, hyperlink speeds, link up/down, and foible states can sum live dynamically configured birthright through emulation runtime, and need no recompile steps to aid checking out a lot of port group configurations.

Many protocol and efficiency violations are instantly suggested, reminiscent of cyclic redundancy determine, preamble, inter-frame hole (IFG), line expense, and forward error correction. Packets can besides live reviewed in interactive or batch periods to assess packet statistics per stream/port, ingress/egress hint, meta-statistics reminiscent of signatures, time stamps, latency and content material sum on the wire.

one of the hallmarks of digital Ethernet options in emulation is their ability to Do complicated performance analysis of tremendous and deeply state-full SoC and multichip techniques. digital Ethernet in emulation has been utilized in validating packet classification, filtering, bandwidth fees, policing, site visitors shaping, classification-of-carrier, congestion, recollection administration, packet sequence drops, IFG evaluation, dynamic load balancing, neighborhood multi-direction and network fabric the exercise of signature evaluation points accessible in virtual Ethernet methods.

virtual Ethernet options reside thoroughly inside application, so anything else can besides live imagined and carried out birthright now for capture and analysis with a hundred% visibility. Examples encompass custom and supplier-specific protocols, usher for higher feature analysis add on and even non-average packet interface types. virtual Ethernet solutions easily accommodate architectural exploration, integration with third-birthday celebration tools, and bypass SoC agreeable judgment that has miniature price in being re-tested for programs looking for stronger verify throughput for subsystems.

For some complicated explore at various and analysis, hundreds of thousands of packets could live essential to hit regular status or ephemeral evaluation features of interest in the design. Take, for example, measuring bit fees for traffic flows in a terabyte Ethernet switch with a 32-MB packet buffer. digital Ethernet signature generation and packet time stamps can live used to measure cut-via and maintain and forward latency conditions, RFC2544, RFC2889, and so forth.

checking out World-class Streaming gadgets

digital Ethernet gives a software-controlled ambiance for producing, transmitting, and analyzing Ethernet packets to examine Ethernet SoCs with an emulation platform. because the emulator runs on enterprise servers, diverse users observed any position on earth can explore at various over 20 million SoC packets per day at the identical time as. VirtuaLAB Ethernet brings complicated Ethernet SoC designs to market on time table with vastly accelerated productivity.

Ron Squiers is a options Architect for Mentor, a Siemens business.

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